The present invention relates to a semiconductor structure with one or more through-holes.
Subassemblies for optoelectronic devices or optoelectronic hybrid integrated circuits may include a semiconductor structure formed as a lid. The lid may be sealed to a base that includes or is connected, for example, to an optical waveguide. The lid may provide a cover for one or more optoelectronic chips or components being optically coupled to the waveguide. Typically, electrical or optical connections may need to be provided to the chips or components mounted within the assembly.
According to one aspect, a method is disclosed to provide a semiconductor structure that has front and back surfaces substantially with one or more through-holes. The method includes etching the semiconductor structure from the back surface in one or more back surface areas corresponding to positions of the one or more through-holes and etching the semiconductor structure from the front surface in one or more front surface areas corresponding to the positions of the one or more through-holes. The front and back surfaces may be etched in either order.
In some implementations, one or more of the following features may be present. The semiconductor structure may include a first semiconductor layer facing the back surface, a second semiconductor layer facing said front surface, and a substantially etch-resistant layer arranged between the first and the second semiconductor layers. The method then may include etching from the back surface through the first semiconductor layer and stopping the etching from the back surface when a back portion of the etch-resistant layer is exposed, where the back portion of the etch-resistant layer corresponds to one or more of the back surface areas. The method also may include etching form the front surface through the second semiconductor layer and stopping the etching from the front surface when a front portion of the etch-resistant layer is exposed, where the front portion of the etch-resistant layer corresponding to one or more of the front surface areas. At least the part of the etch-resistant layer corresponding to the position of each of the one or more through-holes may be removed to form the one or more through-holes after the etching.
At least one of the back etching step and the front etching may include using a liquid chemical etching process, an anisotropic etching process or an aqueous solution of potassium hydroxide.
Preferably, the through-holes are hermetically sealed. The through-holes may be sealed, for example, using a feed-through metallization process. In a particular implementation, hermetically sealing the through-holes includes providing an adhesion layer, a plating base, a feed-through metallization, a diffusion barrier, a wetting layer; and an anti-oxidation barrier.
Etching the back surface areas may include exposing a large back portion of the etch-resistant layer having an area larger than any exposed front portion of the etch resistant layer. The etch-resistant layer may include a material selected, for example, from the group of silicon nitride, silicon oxynitride and silicon dioxide. The etch-resistant layer may include a sandwich layer comprising alternating layers of at least silicon dioxide, silicon nitride and silicon oxynitride.
The semiconductor structure may be used as a lid to encapsulate an opto-electronic component. In that case, the through-holes may be used to establish connections to the components through the encapsulation. The connections may, for example, electrical connections, optical connections, or any other suitable kind of connection which may be needed to communicate with a component or to enable a component to operate.
In another aspect, a semiconductor structure includes a front surface, a back surface arranged substantially opposite to the front surface, and at least one feed-through interconnect each of which includes through-hole connections. Each of the through-holes includes feed-through metallization to provide a conductive path between a lower part of the structure and an upper part of the structure.
Some implementations may include one or more of the following features. For each feed-through interconnect, the feed-through metallizations of the through-holes may be electrically connected to each other within the lower part of the structure and the upper part of the structure. The through-holes may be hermetically sealed, for example, by feed-through metallization.
In a related aspect, an optoelectronic assembly structure may include a semiconductor base with a major surface and an optical waveguide integrally formed along the major surface. An optoelectronic chip may be optically coupled to the waveguide, and a semiconductor lid may be sealed to the base to form an enclosure that covers the chip. The lid includes a front surface, a back surface arranged substantially opposite the front surface, and at least one feed-through interconnect each of which includes through-hole connections. At least one through-hole may be provided with feed-through metallization to provide a current path through the lid to the optoelectronic chip. The optoelectronic chip may include, for example, a laser or other devices. The through-hole connections may provide a hermetic seal for the optoelectronic chip.
Various implementations may include one or more of the following advantages. Formation of a semiconductor structure with through-holes may be simplified. Use of the etch-resistant layer may make the method is easy to control. Therefore, the cross-sectional dimensions of each through-hole may be very well defined. The techniques may be convenient for forming electrical or optical communication paths through a semiconductor structure while maintaining a hermetic sealing of the structure. Furthermore, the techniques may be suited for mass production.
In the present context, the phrase xe2x80x98a substantially etch-resistant layerxe2x80x99 should be interpreted as a layer of material which is at least substantially resistant to the etching process performed on the first semiconductor layer and the etching process performed on the second semiconductor layer. Thus, the substantially etch-resistant layer should be able to resist said etching processes, at least to the extend that at least some of the material of the substantially etch-resistant layer remains after the etching processes of the first and second semiconductor layers have been performed.
A relatively high total conducting capability of the structure may be provided by the use of a large number of through-holes.
Other features and advantages will be readily apparent from the following detailed description, the accompanying drawings and the claims.